This document covers the requirements and considerations for the design of rigid printed wiring boards, based on industry manufacturing capabilities, IPC's Performance "Class 3" for high reliability electronic products and IPC's Design "Level C" for high design complexity.
The purpose of this document is to establish design rules, principles and other considerations for mechanical, electrical and manufacturable properties which the designer can use to select design features, and properties that will result in a board that will meet producibility, performance and cost requirements. Other documents which elaborate further on some of those design rules are available.
It must be stated however that Precision has capabilities to tackle more stringent tolerances and would welcome the opportunity to discuss your special needs.
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External Layers and
Internal Signal Layers |
A - Hole to Pad
B - Track to Hole Edge (non-plated hole)
C - Track Width
D - Track to Track Spacing
E - Track to Pad Spacing
F - Pad to Pad Spacing
G¹ - Track to Board Edge (routed)
G * - Track to Board Edge (scored)
H - Hole Edge to Board Edge (routed)
H - Hole Edge to Board Edge (scored)
I - Hole Size
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min 0.25mm
min 0.30mm
min 0.12mm
min 0.12mm
min 0.12mm
min 0.20mm
min 0.30mm
min 0.60mm
min 0.40mm
min 0.70mm
min 0.30mm
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¹ see CID-017 for further details
* see CID-016 for further details |
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| Internal Power and Ground Planes |
I - Hole to Pad
J - Connection Track
(thermal relief)
K - Plane to Hole Edge (plated)
K - Plane to Hole Edge (non-plated)
L - Plane to Pad
M - Plane to Board Edge (routed)
M - Plane to Board Edge (scored)
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min 0.25mm
min 0.20mm
min 0.40mm
min 0.30mm
min 0.20mm
min 0.30mm
min 0.50mm
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| Legend |
N - Legend to Hole
O - Legend to Pad
(surface mount)
P - Line/Text width
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min 0.10mm
min 0.20mm
min 0.15mm
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| Solder Mask |
Q - Mask to track
R - Mask to Pad
S - Mask Wall (lpsm)
S - Mask Wall (dfsm)
T - Mask to Board Edge (routed)
T - Mask to Board Edge (scored)
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min 0.10mm
min 0.10mm
min 0.10mm
min 0.15mm
min 0.15mm
min 0.40mm
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